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saurabhsingh-pvips/riscv-dv 0

SV/UVM based instruction generator for RISC-V processor verification

shrujal20/shrujal20 0

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aneels3

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Update README.md for PyFlow & add pyucis-viewer in requiremen.txt Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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aneels3

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Remove the pyucis-viewer from requirements.txt Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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Hodjat Asghari Esfeden

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Merge pull request #829 from saurabhsingh-pvips/readme [PyFlow] Update README.md

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Hodjat Asghari Esfeden

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Merge pull request #822 from saurabhsingh-pvips/cov_typo Fix typo with fs3_sign value

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shrujal20

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implement rv64i

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aneels3

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fix issue with imm value for 64 bit instr Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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shrujal20

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aneels3

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fix issues related to sub program Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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Integrate random seed for pyflow Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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aneels3

commit sha 8a4e2a8b1d73970703152c49446e53c51e10efa4

Add support for RV32FD coverage Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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Henrik Fegran

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Added v1.0.0 bitmanip support Signed-off-by: Henrik Fegran <Henrik.Fegran@silabs.com>

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weicaiyang

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Merge pull request #832 from silabs-hfegran/dev_hf_bitmanipv1_0 Bitmanip v1.0.0 support

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Pirmin Vogel

commit sha 3fb3cec0128976ceebbbf286402e575d3f343fa1

Upgrade bitmanip v.0.92 to v.0.93, enable simultaneous use with v.1.00 The main changes implemented by this PR are: 1. Support for bitmanip draft v.0.92 is dropped. 2. Remaining bitmanip instructions not ratified as part of v.1.00 of the bitmanip spec are upgraded to the latest draft (v.0.93). 3. Simultaneous use of the v.1.00 bitmanip instructions and those instructions only part of draft v.0.93 is enabled. 4. Rename bext/bdep to bcompress/bdecompress. This is part of v.0.94. But it's needed as in v.0.93 as well as in v.1.00 sbext from Zbs is renamed to bext, leading to two completely different instructions having the same name. 5. Increase the MAX_INSTR_STR_LEN parameter to accomodate longer instruction names (bdecompressw has 12 characters). Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>

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weicaiyang

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Merge pull request #834 from vogelpi/allow-bitmanip-v.1.00-and-v.0.93 Upgrade bitmanip v.0.92 to v.0.93, enable simultaneous use with v.1.00

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Michael Schaffner

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[style] Break long lines in newly added files Signed-off-by: Michael Schaffner <msf@google.com>

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weicaiyang

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Merge pull request #837 from msfschaffner/break-long-lines [style] Break long lines in newly added files

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Hodjat Asghari Esfeden

commit sha a556f0c8602d63d67724a9a5cd68023009bfec32

Merge pull request #820 from saurabhsingh-pvips/random_seed [PyFlow]: Integrate random seed for PyFlow

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Hodjat Asghari Esfeden

commit sha 96c1ee6f371f2754c45b4831fcab95f6671689d9

Merge pull request #828 from saurabhsingh-pvips/rv32fd_coverage [PyFlow]: Add support for RV32FD coverage

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shrujal20

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implement rv64i

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aneels3

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fix issue with imm value for 64 bit instr Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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shrujal20

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implement rv64imafdc

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fix issues related to sub program Signed-off-by: aneels3 <b150023ec@nitsikkim.ac.in>

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pull request commentgoogle/riscv-dv

[PyFlow]: Add support for RV64IMC

@googlebot I consent.

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